Applications
Inference inside phones, PCs, wearables and appliances
On-device AI moves assistants, transcription, translation, imaging and personalisation into the device itself, improving responsiveness and keeping personal data local.
Representative platforms with the details engineering and procurement teams shortlist on.
Client processor platform with an NPU rated up to 48 TOPS alongside an Intel Arc Xe2 GPU and hybrid CPU cores.
Arm-based 4 nm PC platform with twelve Oryon CPU cores, Adreno graphics and a Hexagon NPU for on-device AI.
Apache 2.0 on-device runtime for machine learning and generative AI, the successor to TensorFlow Lite.
Apache 2.0 compact vision-language model family, from 2 billion parameters down to a 256 million variant.
Specifications are summarised from publicly published manufacturer material and are provided for orientation only. Always confirm current figures directly with the manufacturer before purchasing or designing in.
Chip manufacturer
Supplies Core Ultra client processors that combine CPU, Arc graphics and an integrated NPU, and maintains the open-source OpenVINO toolkit for optimising inference on Intel CPUs, GPUs and NPUs.
Santa Clara, California, United States
Chip manufacturer
Designs the Snapdragon X platform for Windows PCs and edge clients, pairing Oryon CPU cores, Adreno graphics and the Hexagon NPU. Qualcomm also owns the Edge Impulse edge MLOps platform.
San Diego, California, United States
Chip manufacturer
Produces Ryzen AI processors that combine Zen 5 CPU cores, RDNA 3.5 graphics and the XDNA 2 NPU, with large unified memory configurations used for local generative AI workloads.
Santa Clara, California, United States
Chip manufacturer
Publishes the Coral Edge TPU accelerators for low-power on-device inference and maintains LiteRT, the on-device runtime that succeeded TensorFlow Lite, together with the open-weight Gemma model family.
Mountain View, California, United States
Chip manufacturer
Fabless SoC designer whose RK35xx application processors combine Arm CPU clusters, Mali graphics and an integrated NPU, widely used in single-board computers, panel devices and edge video products.
Fuzhou, China
Software provider
Edge MLOps platform, now part of Qualcomm, for collecting data, training and deploying models to microcontrollers, NPUs, CPUs and GPUs across a broad partner hardware ecosystem.
San Jose, California, United States
Software provider
Maintainers of the ggml tensor library and llama.cpp, an MIT-licensed C and C++ inference engine that runs open-weight language models on CPUs and on CUDA, Metal and Vulkan backends.
Sofia, Bulgaria
Software provider
Publishes open-weight language and multimodal models, including Apache 2.0 licensed Mistral Small builds designed for latency-sensitive and self-hosted deployments.
Paris, France
Software provider
Hosts open-weight models and publishes the SmolVLM family of compact vision-language models designed explicitly for on-device inference under the Apache 2.0 licence.
New York, United States